Modern electronic equipment such as televisions, telephones, radios and computers are generally constructed of solid state devices. Integrated circuits are preferred in electronic equipment because they are extremely small and relatively inexpensive. Additionally, integrated circuits are very reliable because they have no moving parts, but are based on the movement of charge carriers.
Typically, as the fabrication of integrated circuits has improved, the thickness of many layers formed in the integrated circuits has been reduced. For example, in the relatively recent past, conventional transistor gate dielectric layers had a thickness on the order of 100 Å. However, more recently, these layers have been formed with a thickness on the order of 20 Å. This trend toward thinner gate dielectric layers may continue, as thinner layers reduce device size and facilitate improved device performance.
However, disadvantages associated with thinner gate dielectrics include the proportionally increased dielectric effect corresponding to a depletion region at the interface between the gate dielectric and a polysilicon gate layer formed over the gate dielectric. Typically, the depletion region provides the electrical equivalent of an insulator approximately 3 Å thick.
Thus, continuing with the preceding example, for a 100 Å thick gate dielectric, a depletion region of 3 Å effectively increases the overall insulation between the gate and the underlying transistor channel from 100 Å to 103 Å. As such, for thicker gate dielectrics, the effect of the depletion region may be considered to have a negligible impact on the gate dielectric. In contrast, however, for a 20 Å thick gate dielectric, a depletion region of 3 Å increases the gate insulator to 23 Å, which is an increase of approximately 15 percent. This may result in a significant reduction in the benefits otherwise provided by the thinner gate dielectric.
One approach to avoiding the depletion region effect of polysilicon transistor gates uses metal as an alternative material for the transistor gate because metal does not present a considerable depletion region, if any. Problems with this approach include the fact that each metal has a single corresponding work function; however, the desired work function values for different transistor types are not the same. Thus, metal gates result in problems with CMOS circuits, which include both PMOS and NMOS transistors. Specifically, because a metal gate provides only a single work function, two different work functions are not provided for the PMOS and NMOS devices with one metal.
A more recent approach to avoiding the depletion region effect of polysilicon transistor gates provides for the formation of a set of transistor gates where one gate is formed from a metal and the other gate is formed from a corresponding metal silicide. Each transistor gate may then have a different work function. However, with this approach, the work functions provided by the metal and its corresponding metal silicide may not be adjustable.